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Stopped · Your code isn't running yet. Until you press Run, the board runs the program already on it.
Nothing printed yet. Press Run.
Not checked yet
Run your code to check it. The checks replay a fixed script on a virtual clock, so the same code always gets the same result.
Each fault really happens in the simulation. Trigger one, watch the figure, then read why.
Play the world: press, slide and turn the parts while the code runs.
A pin can only be 0 or 3.3 V. Switching fast between them, high for SW7-SW0 out of every 256 clocks, dims an LED on Pmod JB and LD0 together.
iynk runs your Verilog as a behavioural model, cycle by cycle on the board clock. It does not synthesise, place or route: no timing, no LUT counts.
| Pin | Connects to | What it does |
|---|---|---|
JB1 | R1 220 Ω → LED anode | The PWM output, JB[0] |
GND | LED cathode (JB pin 5) | The return path |
SW7 | FPGA pin W13 (sw[7]) | Worth 128 of 256: half brightness |
Sensors and actuators this board drives, with the real connections.
Anode to JB pin 1 through 220 Ω, cathode to a Pmod GND pin. Drive it from your design like any LED.
| Part pin | Board pin |
|---|---|
| A | JB1Wire colour orange |
| K | GNDWire colour black |
The board already adds 200 Ω in series, so the LED stays dim but safe even without your resistor; never feed a Pmod pin from 5 V.